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Google unveils sixth generation of TPU chips at Google I/O conference
Machine Learning Infrastructure
May 14, 2024
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Machine Learning Infrastructure

Machine Learning Infrastructure

May 14, 2024

Google unveils sixth generation of TPU chips at Google I/O conference

Product updates

  • Google unveiled its next generation of Tensor Processing Units (TPU), Trillium, at its annual Google I/O developer conference. The TPUs are scheduled for release later this year.

  • Google's Trillium boasts several enhancements from the previous generation. This includes a 4.7x increase in compute performance per chip, wider matrix multiply units (MXUs), higher clock speed, and double the memory bandwidth. The new chips are also 67% more energy-efficient than the previous generation.

  • The chips uniquely carry the third generation of SparseCore, an accelerator specially designed for handling large-scale embeddings often found in advanced recommendation or ranking tasks. This enables Trillium TPUs to train models faster and serve them with lower latency.

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